Programming in VLSI: from communicating processes to delay-insensitive circuits
Developments in concurrency and communication
Developments in concurrency and communication
Handshake circuits: an asynchronous architecture for VLSI programming
Handshake circuits: an asynchronous architecture for VLSI programming
Communicating sequential processes
Communications of the ACM
Guarded commands, nondeterminacy and formal derivation of programs
Communications of the ACM
The design of an asynchronous VHDL synthesizer
Proceedings of the conference on Design, automation and test in Europe
A flexible message passing mechanism for objective VHDL
Proceedings of the conference on Design, automation and test in Europe
Statechart methodology for the design, validation, and synthesis of large scale asynchronous systems
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASPRO-216: A Standard-Cell Q.D.I. 16-Bit RISC Asynchronous Microprocessor
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
The VLSI-programming language tangram and its translation into handshake circuits
EURO-DAC '91 Proceedings of the conference on European design automation
Asynchronous Design By Conversion: Converting Synchronous Circuits into Asynchronous Ones
Proceedings of the conference on Design, automation and test in Europe - Volume 2
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Design automation of real-life asynchronous devices and systems
Foundations and Trends in Electronic Design Automation
Asynchronous data-driven circuit synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Concurrent rewriting semantics and analysis of asynchronous digital circuits
WRLA'10 Proceedings of the 8th international conference on Rewriting logic and its applications
Modeling and synthesis of asynchronous pipelines
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Behavioral synthesis of asynchronous circuits using syntax directed translation as backend
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Automated design of cryptographic devices resistant to multiple side-channel attacks
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
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