Communicating sequential processes
Communicating sequential processes
Trace theory and systolic computations
Volume I: Parallel architectures on PARLE: Parallel Architectures and Languages Europe
Syntax-directed translation of concurrent programs into self-timed circuits
Proceedings of the fifth MIT conference on Advanced research in VLSI
The design of an asynchronous microprocessor
Proceedings of the decennial Caltech conference on VLSI on Advanced research in VLSI
The elegant compiler generator system
WAGA Proceedings of the international conference on Attribute grammars and their applications
A systolic design for acceptors of regular languages
Science of Computer Programming
VLSI programming for the compact disc player
Science of Computer Programming
Communicating sequential processes
Communications of the ACM
A Derivation of a Systolic Rank Order Filter with Constant Response Time
Proceedings of the International Conference on Mathematics of Program Construction, 375th Anniversary of the Groningen University
Occam Programming Manual
Asynchronous Circuits for Low Power: A DCC Error Corrector
IEEE Design & Test
A communicating Petri net model for the design of concurrent asynchronous modules
DAC '94 Proceedings of the 31st annual Design Automation Conference
Timing verification for asynchronous design
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Designing Control Logic for Counterflow Pipeline Processor Using Petri Nets
Formal Methods in System Design
The tangram framework (embedded tutorial): asynchronous circuits for low power
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Distributed simulation of asynchronous hardware: the program driven synchronization protocol
Journal of Parallel and Distributed Computing
Programming methodology
VLSI programming of a low-power asynchronous Reed-Solomon decoder for the DCC player
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
High-level test evaluation of asynchronous circuits
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Statechart methodology for the design, validation, and synthesis of large scale asynchronous systems
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
A Design Framework for Asynchronous/Synchronous Circuits Based on CHP to VHDL Translation
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Low-Latency Contro Structures with Slack
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
Synchronous Full-Scan for Asynchronous Handshake Circuits
Journal of Electronic Testing: Theory and Applications
A Constructive Approach to Hardware/Software Partitioning
Formal Methods in System Design
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Modelling SAMIPS: A Synthesisable Asynchronous MIPS Processor
ANSS '04 Proceedings of the 37th annual symposium on Simulation
ARCS: an architectural level communication driven simulator
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Scan Test Strategy for Asynchronous-Synchronous Interfaces
Journal of Electronic Testing: Theory and Applications
Geometry of synthesis: a structured approach to VLSI design
Proceedings of the 34th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A Framework for Distributed Simulation of Asynchronous Handshake Circuits
ANSS '06 Proceedings of the 39th annual Symposium on Simulation
Conditional partial order graphs and dynamically reconfigurable control synthesis
Proceedings of the conference on Design, automation and test in Europe
Logic Synthesis of Handshake Components Using Structural Clustering Techniques
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Geometry of synthesis III: resource management through type inference
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Concurrent rewriting semantics and analysis of asynchronous digital circuits
WRLA'10 Proceedings of the 8th international conference on Rewriting logic and its applications
Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modeling and synthesis of asynchronous pipelines
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Performance-driven clustering of asynchronous circuits
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
Implementation of handshake components
CSP'04 Proceedings of the 2004 international conference on Communicating Sequential Processes: the First 25 Years
| Hi-index | 0.00 |
In this paper we view VLSI design as a programming activity. VLSI designs are described in the algorithmic programming language Tangram. The paper gives an overview of Tangram, providing sufficient detail to invite the reader to try a small VLSI program himself. Tangram programs can be translated into handshake circuits, networks of elementary components that interact by handshake signaling. We have constructed a silicon compiler that automates this translation and converts these handshake circuits into asynchronous circuits and subsequently into VLSI layouts.