Timing verification for asynchronous design

  • Authors:
  • R. Davies;J. Woods

  • Affiliations:
  • Department of Computer Science, University of Manchester, Manchester, M19 3PL, U.K.;Department of Computer Science, University of Manchester, Manchester, M19 3PL, U.K.

  • Venue:
  • EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
  • Year:
  • 1996

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Abstract