Programming in VLSI: from communicating processes to delay-insensitive circuits
Developments in concurrency and communication
Testing delay-insensitive circuits
Proceedings of the 1991 University of California/Santa Cruz conference on Advanced research in VLSI
Acta Informatica
Handshake circuits: an asynchronous architecture for VLSI programming
Handshake circuits: an asynchronous architecture for VLSI programming
Automatic Verification of Speed-Independent Circuit Designs Using the Circal System
CHARME '93 Proceedings of the IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Linear Test Times for Delay-Insensitive Circuits: a Compilation Strategy
Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies
A single-rail re-implementation of a DCC error detector using a generic standard-cell library
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Single-rail handshake circuits
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
High-level test evaluation of asynchronous circuits
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Concurrency-oriented optimization for low-power asynchronous systems
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
A single-rail re-implementation of a DCC error detector using a generic standard-cell library
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Single-rail handshake circuits
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Some Limitations to Speed-Independence in Asynchronous Circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Control Resynthesis for Control-Dominated Asynchronous Designs
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Architectural optimization for low-power nonpipelined asynchronous systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Implementation of handshake components
CSP'04 Proceedings of the 2004 international conference on Communicating Sequential Processes: the First 25 Years
| Hi-index | 0.00 |
One of the major operations in the VLSI programming language Tangram is the sequencing of computations. A description and critique of the current implementation for this operation is given. Several new implementations are described: one was developed within the SI-algebra framework and the others, based on a count-decode architecture, are the result of an "engineering approach" using a variety of tools.