Exploring design space of parallel realizations: MPEG-2 decoder case study

  • Authors:

  • Basant K. Dwivedi;Jan Hoogerbrugge;Paul Stravers;M. Balakrishnan

  • Affiliations:

  • Indian Institute of Technology Delhi, New Delhi, India;Philips Research, Eindhoven, The Netherlands;Philips Research, Eindhoven, The Netherlands;Indian Institute of Technology Delhi, New Delhi, India

  • Venue:
  • Proceedings of the ninth international symposium on Hardware/software codesign
  • Year:
  • 2001

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Abstract

Many applications lend them to parallelism at different levels of granularity. We first identify the key issues involved in creating a parallel model of an application. These are done with a view to estimate performance and explore the “parallel” design space to select a suitable design point. The framework presented provides an opportunity to perform this exploration both in the target architecture independent and target architecture dependent manner. An MPEG-2 decoder model in YAPI has been presented which has more parallelism and improved performance. This modal has further been mapped onto SpaceCAKE architecture to study its architectural parameters. Detailed results obtained with YAPI simulation (target architecture independent) and TSS simulation (after process-processor binding) on MPEG-2 decoder application establish the effectiveness of our approach.