Digital receiver design using VHDL generation from data flow graphs
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Consistency in Dataflow Graphs
IEEE Transactions on Parallel and Distributed Systems
A Comparison of Statecharts Variants
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Heterogeneous modeling and simulation of embedded systems in El Greco
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
YAPI: application modeling for signal processing systems
Proceedings of the 37th Annual Design Automation Conference
FunState—an internal design representation for codesign
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
embedded system design with multiple languages: embedded tutorial
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
SPI: a system model for heterogeneously specified embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
On core and more: a design perspective for systems-on-a-chip
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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Many signal processing systems make use of event driven mechanisms-typically based on finite state machines (FSMs)-to control the operation of the computationally intensive (data flow) parts. The state machines in turn are often fueled by external inputs as well as by feedback from the signal processing portions of the system. Packet-based transmission systems are a good example for such a close interaction between data and control flow. For a smooth design flow with a maximum degree of modularity it is of crucial importance to be able to model the complete functionality of the system, containing both control and data flow, within one single design environment. While the degree of abstraction should be sufficiently high to model and simulate efficiently, the link to implementation has to be fully supported. For these reasons we developed a computational model that integrates the specification of control and data flow. It combines the notion of multirate dynamic data flow graphs with event driven process activation. Thus, it maintains the flexibility and expressive power of data flow representations while enabling designers to efficiently control these operations by incorporating control automata that may have been designed using protocol compilers or state machine tools.