Efficient demand-driven evaluation. Part 1
ACM Transactions on Programming Languages and Systems (TOPLAS) - Lecture notes in computer science Vol. 174
Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
VLSI array processors
Architectures for statically scheduled dataflow
Journal of Parallel and Distributed Computing - Special issue: data-flow processing
The VAL Language: Description and Analysis
ACM Transactions on Programming Languages and Systems (TOPLAS)
A straightforward denotational semantics for non-determinate data flow programs
POPL '78 Proceedings of the 5th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
The semantic elegance of applicative languages
FPCA '81 Proceedings of the 1981 conference on Functional programming languages and computer architecture
Integration of SDL and VHDL for high-level digital design
EURO-DAC '92 Proceedings of the conference on European design automation
Digital receiver design using VHDL generation from data flow graphs
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Heterogeneous Simulation—Mixing Discrete-Event Models with Dataflow
Journal of VLSI Signal Processing Systems - Special issue on the rapid prototyping of application specific signal processors (RASSP) program
Data memory minimisation for synchronous data flow graphs emulated on DSP-FPGA targets
DAC '97 Proceedings of the 34th annual Design Automation Conference
Readings in hardware/software co-design
The synchronous approach to reactive and real-time systems
Readings in hardware/software co-design
Ptolemy: a framework for simulating and prototyping heterogeneous systems
Readings in hardware/software co-design
Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks
Journal of VLSI Signal Processing Systems
Consistency Analysis of Reconfigurable Dataflow Specifications
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Mulitdimensional Streams Rooted in Dataflow
PACT '93 Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism
From SIGNAL to fine-grain parallel implementations
PACT '94 Proceedings of the IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques
Consistency analysis of reconfigurable dataflow specifications
Embedded processor design challenges
PCC: a modeling technique for mixed control/data flow systems
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Implementing DSP applications on heterogeneous targets using minimal size data buffers
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Multidimensional DSP Core Synthesis for FPGA
Journal of VLSI Signal Processing Systems
Proceedings of the conference on Design, automation and test in Europe
Buffer capacity computation for throughput-constrained modal task graphs
ACM Transactions on Embedded Computing Systems (TECS)
Scheduling dynamic dataflow graphs with bounded memory using the token flow model
ICASSP'93 Proceedings of the 1993 IEEE international conference on Acoustics, speech, and signal processing: plenary, special, audio, underwater acoustics, VLSI, neural networks - Volume I
Efficient deadlock avoidance for streaming computation with filtering
Proceedings of the 17th ACM SIGPLAN symposium on Principles and Practice of Parallel Programming
Worst-case throughput analysis of real-time dynamic streaming applications
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Cyclo-static DataFlow phases scheduling optimization for buffer sizes minimization
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Mathematical formalisms for performance evaluation of networks-on-chip
ACM Computing Surveys (CSUR)
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Analytical properties of programming languages with dataflow graph semantics arediscussed. It is shown that one of the most serious problems with these languages is thatsubtle inconsistencies between parts of the dataflow graph can be inadvertently created.These inconsistencies can lead to deadlock, or in the case of nonterminating programs, tounbounded memory requirements. Consistency is defined to mean that the same numberof tokens is consumed as produced on any arc, in the long run. A token-flow model isdeveloped for testing for inconsistency. The method is a generalization of consistencychecks for synchronous dataflow (SDF) graphs. The token-flow model is compared tosimilar tests applied to hybrid dynamical systems. It is argued that dataflow semanticsmake steady-state analysis possible, leading to a simpler method in most cases.