Consistency analysis of reconfigurable dataflow specifications

Authors:
Bishnupriya Bhattacharya;Shuvra S. Bhattacharyya
Affiliations:
Cadence Design Systems, San Jose CA;Department of Electrical and Computer Engineering, and Institute for Advanced Computer Studies, University of Maryland, College Park MD
Venue:
Embedded processor design challenges
Year:
2002

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Abstract

Parameterized dataflow is a meta-modeling approach for incorporating dynamic reconfiguration capabilities into broad classes of dataflow-based design frameworks for digital signal processing (DSP). Through a novel formalization of dataflow parameterization, and a disciplined approach to specifying parameter reconfiguration, the parameterized dataflow framework provides for automated synthesis of robust and efficient embedded software. Central to these synthesis objectives is the formulation and analysis of consistency in parameterized dataflow specifications. Consistency analysis of reconfigurable specifications is particularly challenging due to their inherently dynamic behavior. This paper presents a novel framework, based on a concept of local synchrony, for managing consistency when synthesizing implementations from dynamically-reconfigurable, parameterized dataflow graphs.