Consistency Analysis of Reconfigurable Dataflow Specifications
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Flexibility/Cost-Tradeoffs of Platform-Based Systems
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Consistency analysis of reconfigurable dataflow specifications
Embedded processor design challenges
Flexibility/cost-tradeoffs of platform-based systems
Embedded processor design challenges
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
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Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools are limited in their ability to effectively handle dynamic application behavior. In this paper, we develop efficient quasi-static scheduling techniques for a broad class of dynamically reconfigurable dataflow specifications. We use a CD to DAT sample rate conversion system and a speech compression application to illustrate the efficacy of our scheduling techniques in real life DSP systems.