Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
The Chinook hardware/software co-synthesis system
ISSS '95 Proceedings of the 8th international symposium on System synthesis
The STATEMATE semantics of statecharts
ACM Transactions on Software Engineering and Methodology (TOSEM)
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Combining multiple models of computation for scheduling and allocation
Proceedings of the 6th international workshop on Hardware/software codesign
Representation of process mode correlation for scheduling
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Scheduling hardware/software systems using symbolic techniques
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Representation of function variants for embedded system optimization and synthesis
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
FunState—an internal design representation for codesign
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
System-level synthesis
embedded system design with multiple languages: embedded tutorial
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Execution cost interval refinement in static software analysis
Journal of Systems Architecture: the EUROMICRO Journal - Modern methods and tools in digital system design
Interval-Based Analysis of Software Processes
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
A Transformational approach to constraint relaxation of a time-driven simulation model
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Hardware/Software CO-Design: Principles and Practice
Hardware/Software CO-Design: Principles and Practice
Modeling concurrent real-time processes using discrete events
Annals of Software Engineering
Dynamic response time optimization for SDF graphs
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Codesign of Embedded Systems: Status and Trends
IEEE Design & Test
PCC: a modeling technique for mixed control/data flow systems
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A Co-Design Methodology Based on Formal Specification and High-level Estimation
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
An evolutionary approach to system-level synthesis
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
An Approach to Mixed Systems Co-Synthesis
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
A framework for evaluating design tradeoffs in packet processing architectures
Proceedings of the 39th annual Design Automation Conference
Transformation of SDL specifications for system-level timing analysis
Proceedings of the tenth international symposium on Hardware/software codesign
Workload Characterization Model for Tasks with Variable Execution Demand
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Design for Timing Predictability
Real-Time Systems
Power macromodeling of MPSoC message passing primitives
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Analysis of SystemC actor networks for efficient synthesis
ACM Transactions on Embedded Computing Systems (TECS)
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Embedded systems typically include reactive and transformative functions, often described in different languages and semantics which are well established in their respective application domains. Additionally, a large part of the system functionality and components is reused from previous designs including legacy code. There is little hope that a single language will replace this heterogeneous set of languages. A design process must be able to bridge the semantic differences for verification and synthesis and should account for limited knowledge of system properties. This paper presents the system property intervals (SPI) model, which employs behavioral intervals and process modes to allow the common representation of different languages and semantics. This model is the basis of a workbench which is targeted at the design of heterogeneously specified embedded systems.