A framework for evaluating design tradeoffs in packet processing architectures

Authors:
Lothar Thiele;Samarjit Chakraborty;Matthias Gries;Simon Künzli
Affiliations:
Swiss Federal Institute of Technology (ETH) Zürich, Züurich, Switzerland;Swiss Federal Institute of Technology (ETH) Zürich, Züurich, Switzerland;Swiss Federal Institute of Technology (ETH) Zürich, Züurich, Switzerland;Swiss Federal Institute of Technology (ETH) Zürich, Züurich, Switzerland
Venue:
Proceedings of the 39th annual Design Automation Conference
Year:
2002

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Abstract

We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simulation, which tend to be infeasible when the design space is very large. We illustrate the feasibility of our method using a detailed case study.