Compiler support for software-based cache partitioning
LCTES '95 Proceedings of the ACM SIGPLAN 1995 workshop on Languages, compilers, & tools for real-time systems
YAPI: application modeling for signal processing systems
Proceedings of the 37th Annual Design Automation Conference
Caches with Compositional Performance
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Predictable Instruction Caching for Media Processors
ASAP '02 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
OS-Controlled Cache Predictability for Real-Time Systems
RTAS '97 Proceedings of the 3rd IEEE Real-Time Technology and Applications Symposium (RTAS '97)
Computer Architecture: A Quantitative Approach
Computer Architecture: A Quantitative Approach
Extending the reach of microprocessors: column and curious caching
Extending the reach of microprocessors: column and curious caching
Dynamic Partitioning of Shared Cache Memory
The Journal of Supercomputing
Compositional Memory Systems for Multimedia Communicating Tasks
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Static cache partitioning robustness analysis for embedded on-chip multi-processors
Proceedings of the 3rd conference on Computing frontiers
Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors
Transactions on High-Performance Embedded Architectures and Compilers I
Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors
Journal of Signal Processing Systems
Design and implementation of an operating system for composable processor sharing
Microprocessors & Microsystems
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In current multi-media systems major parts of the functionality consist of software tasks executed on a set of concurrently operating processors. Those tasks interfere with each other when they share memory and other hardware components. For instance when the tasks share caches and no precautions are taken they potentially flush each other's data at random. In this case the control over the system performance is lost. However, in media processing the performance must be under tight control. In particular the performance of each individual task must be preserved if the tasks are executed concurrently in arbitrary combinations or if additional tasks are added. A system satisfying this property is addressed as being compositional.This paper proposes a novel cache partitioning technique that enhances compostionality. We assume a cache to be a rectangular array of memory elements arranged in "sets" (rows) and "ways" (columns). We perform two partitioning types. First, each task and each inter-task common data gets an exclusive part of the cache sets. Second, inside the cache sets of common data each task accessing it gets a number of ways. We apply the proposed method on a homogeneous multiprocessor using two applications: H.264 decoding and picture-in-picture-TV. Our experiments indicate that, for both applications, under our partitioning scheme the sum of misses of the individual tasks executed separately and the number of misses of all tasks executed concurrently differs at most by 4%. We conclude that compositionality is achieved within reasonable bounds. Additionally, our technique appears to improve the efficiency of the cache operation.