Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
CoWare—a design environment for heterogenous hardware/software systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Heterogeneous modeling and simulation of embedded systems in El Greco
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Surviving the SOC revolution: a guide to platform-based design
Surviving the SOC revolution: a guide to platform-based design
YAPI: application modeling for signal processing systems
Proceedings of the 37th Annual Design Automation Conference
System Design with SystemC
Software Synthesis from Dataflow Graphs
Software Synthesis from Dataflow Graphs
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications
EDTC '97 Proceedings of the 1997 European conference on Design and Test
galsC: A Language for Event-Driven Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
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VCC庐(Virtual Component Co-Design) is a system level software tool that supports the design of concurrent systems by specifying the functional model as a set of interconnected functional blocks, the system architecture, and the mapping between functional blocks and architectural elements. VCC provides functional simulation, performance estimation, and refinement of the model to implementation. This chapter provides a brief tutorial on the VCC tool. It describes the model of concurrency in VCC's default discrete event model of computation. While modeling a system, the importance of separating the behavioral model from the implementation architecture is emphasized. The techniques used to model performance and implementation of the architecture components, as a set of collaborating services, are explained in some detail. Customization of the model of computation, and communication between functional blocks is also discussed. An example is provided that demonstrates the dataflow model of computation implemented on top of the VCC infrastructure. Finally the automatic generation of an implementation from VCC (in terms of HDL and/or C, and the communication code) is described.