Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study

Authors:
Andy D. Pimentel;Todor Stefanov;Hristo Nikolov;Mark Thompson;Simon Polstra;Ed F. Deprettere
Affiliations:
Computer Systems Architecture group Informatics Institute, University of Amsterdam, The Netherlands;Leiden Embedded Research Center, Leiden University, The Netherlands;Leiden Embedded Research Center, Leiden University, The Netherlands;Computer Systems Architecture group Informatics Institute, University of Amsterdam, The Netherlands;Computer Systems Architecture group Informatics Institute, University of Amsterdam, The Netherlands;Leiden Embedded Research Center, Leiden University, The Netherlands
Venue:
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Year:
2008

Citing 18
Cited 1

Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip

Proceedings of the 38th annual Design Automation Conference
System-level abstraction semantics

Proceedings of the 15th international symposium on System Synthesis
A Heterogeneous Multiprocessor Architecture for Flexible Media Processing

IEEE Design & Test
Algorithmic transformation techniques for efficient exploration of alternative application instances

Proceedings of the tenth international symposium on Hardware/software codesign
Mapping concurrent applications onto architectural platforms

Networks on chip
System Design Using Kahn Process Networks: The Compaan/Laura Approach

Proceedings of the conference on Design, automation and test in Europe - Volume 1
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels

IEEE Transactions on Computers
Overview of the MPSoC design challenge

Proceedings of the 43rd annual Design Automation Conference
Scientific workflow management and the Kepler system: Research Articles

Concurrency and Computation: Practice & Experience - Workflow in Grid Systems
UML-based multiprocessor SoC design framework

ACM Transactions on Embedded Computing Systems (TECS)
Multi-processor system design with ESPAM

CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms

Journal of Systems Architecture: the EUROMICRO Journal
pn: a tool for improved derivation of process networks

EURASIP Journal on Embedded Systems
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs

CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
A framework for system-level modeling and simulation of embedded systems architectures

EURASIP Journal on Embedded Systems
Calibration of abstract performance models for system-level design space exploration

Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Daedalus: toward composable multimedia MP-SoC design

Proceedings of the 45th annual Design Automation Conference
Systematic and Automated Multiprocessor System Design, Programming, and Implementation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Integrating Memory Optimization with Mapping Algorithms for Multi-Processors System-on-Chip

ACM Transactions on Embedded Computing Systems (TECS)

Quantified Score

Hi-index	0.00

Visualization

Abstract

Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which design exploration, system-level synthesis, application mapping, and system prototyping of MP-SoC architectures are highly automated. In this paper, we describe Daedalus from a software perspective, explaining its supporting software infrastructure and the way the various tools interoperate. Moreover, we discuss the lack of support for achieving tool interoperability that we have encountered during the development of Daedalus, and present several ideas of future research directions to address this issue. More specifically, we argue that a so-called Common Design Flow Infrastructure (CDFI) for system-level design flows is needed to improve and stimulate research and development in the area of system-level design methodology.