Daedalus: toward composable multimedia MP-SoC design
Proceedings of the 45th annual Design Automation Conference
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
On compile-time evaluation of process partitioning transformations for Kahn process networks
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Design Trade-offs in Customized On-chip Crossbar Schedulers
Journal of Signal Processing Systems
Electronic system-level synthesis methodologies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Generation and calibration of compositional performance analysis models for multi-processor systems
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Multiprocessor systems-on-chip synthesis using multi-objective evolutionary computation
Proceedings of the 12th annual conference on Genetic and evolutionary computation
A H.264 decoder: a design style comparison case study
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Throughput modeling to evaluate process merging transformations in polyhedral process networks
Proceedings of the Conference on Design, Automation and Test in Europe
Model-based synthesis and optimization of static multi-rate image processing algorithms
Proceedings of the Conference on Design, Automation and Test in Europe
Automated synthesis of streaming C applications to process networks in hardware
Proceedings of the Conference on Design, Automation and Test in Europe
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Modeling adaptive streaming applications with parameterized polyhedral process networks
Proceedings of the 48th Design Automation Conference
A framework for high-level synthesis of heterogeneous MP-SoC
Proceedings of the great lakes symposium on VLSI
Scenario-based design flow for mapping streaming applications onto on-chip many-core systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
Bridging the chasm between MDE and the world of compilation
Software and Systems Modeling (SoSyM)
Mapping of streaming applications considering alternative application specifications
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Sequential specification of time-aware stream processing applications
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Fast template-based heterogeneous MPSoC synthesis on FPGA
ARC'13 Proceedings of the 9th international conference on Reconfigurable Computing: architectures, tools, and applications
A methodology for automated design of hard-real-time embedded streaming systems
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Space optimal solution for data reordering in streaming applications on NoC based MPSoC
Journal of Systems Architecture: the EUROMICRO Journal
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
Solving system-level synthesis problem by a multi-objective estimation of distribution algorithm
Expert Systems with Applications: An International Journal
Hi-index | 0.04 |
For modern embedded systems in the realm of high-throughput multimedia, imaging, and signal processing, the complexity of embedded applications has reached a point where the performance requirements of these applications can no longer be supported by embedded system architectures based on a single processor. Thus, the emerging embedded system-on-chip platforms are increasingly becoming multiprocessor architectures. As a consequence, two major problems emerge, namely how to design and how to program such multiprocessor platforms in a systematic and automated way in order to reduce the design time and to satisfy the performance needs of applications executed on such platforms. As an efficient solution to these two problems, in this paper, we present the methodology and techniques implemented in a tool called Embedded System-level Platform synthesis and Application Mapping (ESPAM) for automated multiprocessor system design, programming, and implementation. ESPAM moves the design specification and programming from the Register Transfer Level and low-level C to a higher system level of abstraction. We explain how, starting from system-level platform, application, and mapping specifications, a multiprocessor platform is synthesized, programmed, and implemented in a systematic and automated way. The class of multiprocessor platforms we consider is introduced as well. To validate and evaluate our methodology, we used ESPAM to automatically generate and program several multiprocessor systems that execute three image processing applications, namely Sobel edge detection, Discrete Wavelet Transform, and Motion JPEG encoder. The performance of the systems that execute these applications is also presented in this paper.