A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
pn: a tool for improved derivation of process networks
EURASIP Journal on Embedded Systems
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A co-design approach for embedded system modeling and code generation with UML and MARTE
Proceedings of the Conference on Design, Automation and Test in Europe
Platform-based design from parallel C specifications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Systematic and Automated Multiprocessor System Design, Programming, and Implementation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast template-based heterogeneous MPSoC synthesis on FPGA
ARC'13 Proceedings of the 9th international conference on Reconfigurable Computing: architectures, tools, and applications
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In this paper we propose an ESL synthesis framework which, from the C code of an application and a description of a generic architecture, automatically explores and generates a complete synthesizable version of a H-MPSoC architecture along with the adapted code application. We developed a Design Space Exploration (DSE) algorithm that merges hardware specialization, data-parallelism exploration, processor instantiation and task mapping according to user performance and cost constraints. We also inserted HLS in the DSE loop and get fast exploration of hardware acceleration. A new ESL framework is presented, it combines our contributions with some legacy tools issued from our and another team. We validated our framework with a case study of an MJPEG decoder.