CoWare—a design environment for heterogenous hardware/software systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Multilanguage design of heterogeneous systems
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
System Design with SystemC
System Design: A Practical Guide with Specc
System Design: A Practical Guide with Specc
RTOS scheduling in transaction level models
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
VCore-based platform for SoC design
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Journal of VLSI Signal Processing Systems
Multi-processor system design with ESPAM
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Daedalus: toward composable multimedia MP-SoC design
Proceedings of the 45th annual Design Automation Conference
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
ACM Transactions on Embedded Computing Systems (TECS)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
Raising the level of abstraction is widely seen as the solution for closing the productivity gap in system design. They key for the success of this approach, however, are well-defined abstraction levels and models. In this paper, we present such system level semantics to cover the system design process. We define properties and features of each model. Formalization of the flow enables design automation for synthesis and verification to achieve the required productivity gains. Through customization, the semantics allow creation of specific design methodologies. We applied the concepts to system languages SystemC and SpecC. Using the example of a JPEG encoder, we will demonstrate the feasibility and effectiveness of the approach.