Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Hardware synthesis from C/C++ models
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A Hardware-Software Codesign Methodology for DSP Applications
IEEE Design & Test
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
First version of a data flow procedure language
Programming Symposium, Proceedings Colloque sur la Programmation
System Design Using Kahn Process Networks: The Compaan/Laura Approach
Proceedings of the conference on Design, automation and test in Europe - Volume 1
PeaCE: A hardware-software codesign environment for multimedia embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Exploiting statically schedulable regions in dataflow programs
ICASSP '09 Proceedings of the 2009 IEEE International Conference on Acoustics, Speech and Signal Processing
Software Code Generation for the RVC-CAL Language
Journal of Signal Processing Systems
Synthesizing Hardware from Dataflow Programs
Journal of Signal Processing Systems
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The new generation of multicore processors and reconfigurable hardware platforms provides a dramatic increase of the available parallelism and processing capabilities. However, one obstacle for exploiting all the promises of such platforms is deeply rooted in sequential thinking. The sequential programming model does not naturally expose potential parallelism that effectively permits to build parallel applications that can be efficiently mapped on different kind of platforms. A shift of paradigmis necessary at all levels of application development to yield portable and scalable implementations on the widest range of heterogeneous platforms. This paper presents a design flow for the hardware and software synthesis of heterogeneous systems allowing to automatically generate hardware and software components as well as appropriate interfaces, from a unique high-level description of the application, based on the dataflow paradigm, running onto heterogeneous architectures composed by reconfigurable hardware units and multicore processors. Experimental results based on the implementation of several video coding algorithms onto heterogeneous platforms are also provided to show the effectiveness of the approach both in terms of portability and scalability.