Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
SUIF: an infrastructure for research on parallelizing and optimizing compilers
ACM SIGPLAN Notices
Resolution of dynamic memory allocation and pointers for the behavioral synthesis form C
DATE '00 Proceedings of the conference on Design, automation and test in Europe
CIL: Intermediate Language and Tools for Analysis and Transformation of C Programs
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Stream Processing Hardware from Functional Language Specifications
HICSS '03 Proceedings of the 36th Annual Hawaii International Conference on System Sciences (HICSS'03) - Track 9 - Volume 9
LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Sealable compile-time scheduler for multi-core architectures
Proceedings of the Conference on Design, Automation and Test in Europe
Exploring the concurrency of an MPEG RVC decoder based on dataflow program analysis
IEEE Transactions on Circuits and Systems for Video Technology
Exploiting Statically Schedulable Regions in Dataflow Programs
Journal of Signal Processing Systems
Overview of the MPEG Reconfigurable Video Coding Framework
Journal of Signal Processing Systems
Hardware and software synthesis of heterogeneous systems from dataflow programs
Journal of Electrical and Computer Engineering - Special issue on ESL Design Methodology
VLSI Design - Special issue on VLSI Circuits, Systems, and Architectures for Advanced Image and Video Compression Standards
Orcc: multimedia development made easy
Proceedings of the 21st ACM international conference on Multimedia
3D graphics coding in a reconfigurable environment
Image Communication
Methods to explore design space for MPEG RMC codec specifications
Image Communication
The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms
Journal of Real-Time Image Processing
Journal of Real-Time Image Processing
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The MPEG Reconfigurable Video Coding (RVC) framework is a new standard under development by MPEG that aims at providing a unified high-level specification of current and future MPEG video coding technologies using dataflow models. In this framework, a decoder is built as a configuration of video coding modules taken from the standard MPEG toolbox library or proprietary libraries. The elements of the library are specified by a textual description that expresses the I/O behavior of each module and by a reference software written using a subset of the CAL Actor Language named RVC-CAL. A decoder configuration is written in an XML dialect by connecting a set of CAL modules. Code generators are fundamental supports that enable the direct transformation of a high level specification to efficient hardware and software implementations. This paper presents a synthesis tool that from a CAL dataflow program generates C code and an associated SystemC model. The generated code is validated against the original CAL description simulated using the Open Dataflow environment. Experimental results of the translation of two descriptions of an MPEG-4 Simple Profile decoder with different granularities are shown and discussed.