Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Software pipelining: an effective scheduling technique for VLIW machines
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Static Rate-Optimal Scheduling of Iterative Data-Flow Programs Via Optimum Unfolding
IEEE Transactions on Computers
Scheduling and behavioral transformation for parallel systems
Scheduling and behavioral transformation for parallel systems
Static scheduling for synthesis of DSP algorithms on various models
Journal of VLSI Signal Processing Systems
Circuit Retiming Applied to Decomposed Software Pipelining
IEEE Transactions on Parallel and Distributed Systems
RECOD: a retiming heuristic to optimize resource and memory utilization in HW/SW codesigns
Proceedings of the 6th international workshop on Hardware/software codesign
VLSI and Modern Signal Processing
VLSI and Modern Signal Processing
Scheduling Data-Flow Graphs via Retiming and Unfolding
IEEE Transactions on Parallel and Distributed Systems
Fully Parallel Hardware/Software Codesign for Multi-Dimensional DSP Applications
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Extended retiming: optimal scheduling via a graph-theoretical approach
ICASSP '99 Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 04
IEEE Transactions on Signal Processing
Faster maximum and minimum mean cycle algorithms for system-performance analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Many computation-intensive iterative or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). The execution of all tasks of a DFG is called an iteration, with the average computation time of an iteration the iteration period. A great deal of research has been done attempting to optimize such applications by applying various graph transformation techniques to the DFG in order to minimize this iteration period. Two of the most popular are retiming and unfolding, which can be performed in tandem to achieve an optimal iteration period. However, the result is a transformed graph which is much larger than the original DFG. To the authors' knowledge, there is no technique which can be combined with minimal unfolding to transform a DFG into one whose iteration period matches that of the optimal schedule under a pipelined design. This paper proposes a new technique, extended retiming, which does just this. We construct the appropriate retiming functions and design an efficient retiming algorithm which may be applied directly to a DFG instead of the larger unfolded graph. Finally, we show through experiments the effectiveness of our algorithms.