Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Data memory minimisation for synchronous data flow graphs emulated on DSP-FPGA targets
DAC '97 Proceedings of the 34th annual Design Automation Conference
3D exploration of software schedules for DSP algorithms
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
An object oriented design method for reconfigurable computing systems
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Software Synthesis from Dataflow Graphs
Software Synthesis from Dataflow Graphs
Digital Signal Processing: A Practical Approach
Digital Signal Processing: A Practical Approach
Mapping multirate dataflow to complex RT level hardware models
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Code Generation of Data Dominated DSP Applications for FPGA Targets
RSP '98 Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping
Correct and non-defensive glue design using abstract models
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Static dataflow with access patterns: semantics and analysis
Proceedings of the 49th Annual Design Automation Conference
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The paper explores a number of possible hardware architectures for implementing synchronous dataflow (SDF) models of digital signal processing (DSP) applications in reconfigurable logic components, for example, Field Programmable Gate Arrays (FPGAs). The objective is to produce efficient hardware implementations of SDF graphs by exploiting the parallelism inherent in most graphs whilst taking advantage of the reconfigurable aspects of the target architecture. Classic area/performance tradeoffs can be made in order to meet the requirements of DSP applications.