Journal of Systems and Software
Compaan: deriving process networks from Matlab for embedded signal processing architectures
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Software Synthesis from Dataflow Graphs
Software Synthesis from Dataflow Graphs
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
SystemC: From the Ground Up
VHDL for Digital Design
System-scenario-based design of dynamic embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs
Proceedings of the Conference on Design, Automation and Test in Europe
Multidimensional synchronous dataflow
IEEE Transactions on Signal Processing
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Novel cognitive radio platforms, such as IMEC's COgnitive Baseband RAdio (COBRA), should ensure the feasibility of multiple streams and their reconfigurability and scalability during run-time. The control over these tasks should be dedicated to a run-time controller that (re)allocates the resources on the platform. E.g., when the channel conditions change requiring a switching to different modulation and coding scheme or a user starts a new stream. Current transaction level models are too detailed for rapid exploration of all run-time options and the high-level data-flow frameworks (such as Kahn process networks) lack the dynamism and reconfigurability that is essential for the exploration. In this paper we propose the DAtaflow for Run-Time (DART), the high-level dynamic data-flow platform model framework, suited for rapid run-time control development. We sketch how to use this framework to develop such a controller in the reactive and more challenging, proactive way. We derive the component timing based on Instruction Set Simulator (ISS) simulation and the reconfiguration timing based on Transaction Level Modeling (TLM) simulation. Finally, we verify results of our DART approach with full TLM simulation of our platform.