Real-time Euclid: a language for reliable real-time systems
IEEE Transactions on Software Engineering - Special issue on reliability and safety in real-time process control
Calculating the maximum, execution time of real-time programs
Real-Time Systems
Predicting deterministic execution times of real-time programs
Predicting deterministic execution times of real-time programs
Efficient software performance estimation methods for hardware/software codesign
DAC '96 Proceedings of the 33rd annual Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Static timing analysis of embedded software
DAC '97 Proceedings of the 34th annual Design Automation Conference
Software performance estimation strategies in a system-level design tool
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
An instruction-level functionally-based energy estimation model for 32-bits microprocessors
Proceedings of the 37th Annual Design Automation Conference
A multi-level strategy for software power estimation
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Dynamic modeling of inter-instruction effects for execution time estimation
Proceedings of the 14th international symposium on Systems synthesis
Timed compiled-code simulation of embedded software for performance analysis of SOC design
Proceedings of the 39th annual Design Automation Conference
FPGA resource and timing estimation from Matlab execution traces
Proceedings of the tenth international symposium on Hardware/software codesign
System-Level Performance Analysis in SystemC
Proceedings of the conference on Design, automation and test in Europe - Volume 1
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Probabilistic source-level optimisation of embedded programs
LCTES '05 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Synthesis for SoC architecture using VCores
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Extracting and improving microarchitecture performance on reconfigurable architectures
International Journal of Parallel Programming - Special issue: The next generation software program
Cycle-approximate retargetable performance estimation at the transaction level
Proceedings of the conference on Design, automation and test in Europe
Including real-life application code into power aware network simulation
Proceedings of the 3rd International ICST Conference on Simulation Tools and Techniques
Accurate power-aware simulation of wireless sensor networks considering real-life application code
Proceedings of the 13th ACM international conference on Modeling, analysis, and simulation of wireless and mobile systems
Performance modeling of embedded applications with zero architectural knowledge
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Automatic application-specific microarchitecture reconfiguration
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
TLM automation for multi-core design
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
ESL Design and Verification: A Prescription for Electronic System Level Methodology
ESL Design and Verification: A Prescription for Electronic System Level Methodology
Automated, retargetable back-annotation for host compiled performance and power modeling
Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
Hi-index | 0.00 |
In this paper a comprehensive methodology for software execution time estimation is presented. The methodology is supported by rigorous mathematical models of C statements in terms of elementary operations. The deterministic contribution is combined with a statistical term accounting for all those aspects that cannot be quantified exactly. The methodology has been validated by realizing a complete prototype toolset, used to carry out the experiments.