A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning
EURO-DAC '94 Proceedings of the conference on European design automation
The Synthesis Approach to Digital System Design
The Synthesis Approach to Digital System Design
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
The extended partitioning problem: hardware/software mapping and implementation-bin selection
RSP '95 Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP'95)
Adaptation of force-directed scheduling algorithm for hardware/software partitioning
RSP '95 Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP'95)
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Interface Optimization During Hardware-Software Partitioning
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
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Abstract: Telecommunications systems, like other embedded systems, are dataflow systems, easily represented by a set of tasks and precedence constraints. The main goal of the design of such systems is to determine for each task the assignment (hardware or software), the scheduling and resources required. We consider assignment and scheduling to be closely linked in hardware/software partitioning and therefore propose a new approach to hardware/software partitioning using task scheduling. This approach is a list scheduling algorithm, based on the calculation of forces. The results obtained on a telecommunications system (acoustic echo canceller) are then described.