Adaptation of force-directed scheduling algorithm for hardware/software partitioning

Authors:
F. Rousseau;J. Benzakki;J.-M. Berge;M. Israel
Affiliations:
-;-;-;-
Venue:
RSP '95 Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP'95)
Year:
1995

Citing 0
Cited 6

A codesign experiment in acoustic echo cancellation: GMDFα

ACM Transactions on Design Automation of Electronic Systems (TODAES)
A generic multi-unit architecture for codesign methodologies

CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Overview of the Ecos Project

RSP '97 Proceedings of the 8th International Workshop on Rapid System Prototyping (RSP '97) Shortening the Path from Specification to Prototype
A Codesign Experiment in Acoustic Echo Cancellation: GMDFa

ISSS '96 Proceedings of the 9th international symposium on System synthesis
Hardware/Software Partitioning for Telecommunications Systems

COMPSAC '96 Proceedings of the 20th Conference on Computer Software and Applications
A Force-Directed Scheduling based architecture generation algorithm and design tool for FPGAs

Journal of Systems Architecture: the EUROMICRO Journal

Quantified Score

Hi-index	0.00

Visualization

Abstract

An algorithm for the hardware/software partitioning problem is presented. In data flow systems, task scheduling modifies global characteristics and allows different implementation solutions. Our algorithm is based on assignment and scheduling algorithms which are well known in high-level synthesis. At each iteration, one task is scheduled if it involves the weakest constraints on the other tasks. Thus, the algorithm schedules all the tasks and gives implementation. This new algorithm is an adaptation of the force-directed scheduling algorithm with a cost function computation for hardware/software partitioning.