Task Allocation and Precedence Relations for Distributed Real-Time Systems
IEEE Transactions on Computers
Software requirements: analysis and specification
Software requirements: analysis and specification
Experiments with a Program Timing Tool Based on Source-Level Timing Schema
Computer - Special issue on real-time systems
Object lifecycles: modeling the world in states
Object lifecycles: modeling the world in states
Sizing synchronization queues: a case study in higher level synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Embedded real-time systems
Multiple microcontrollers in an embedded system
Dr. Dobb's Journal
Real-time object-oriented modeling
Real-time object-oriented modeling
A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning
EURO-DAC '94 Proceedings of the conference on European design automation
A method for partitioning UNITY language in hardware and software
EURO-DAC '94 Proceedings of the conference on European design automation
A path-based technique for estimating hardware runtime in HW/SW-cosynthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Synthesis fo the hardware/software interface in microcontroller-based systems
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Graph Algorithms
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Efficient Scheduling Algorithms for Real-Time Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Declustering: A New Multiprocessor Scheduling Technique
IEEE Transactions on Parallel and Distributed Systems
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Configuration-level hardware/software partitioning for real-time embedded systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
TigerSwitch: a case study in embedded computing system design
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
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Many embedded computers are distributed systems, composed of several heterogeneous processors and communication links of varying speeds and topologies. This paper describes a new, heuristic algorithm which simultaneously synthesizes the hardware and software architectures of a distributed system to meet a performance goal and minimize cost. The hardware architecture of the synthesized system consists of a network of processors of multiple types and arbitrary communication topology: the software architecture consists of an allocation of processes to processors and a schedule for the processes. Most previous work in co-synthesis targets an architectural template, whereas this algorithm can synthesize a distributed system of arbitrary topology. The algorithm works from a technology database which describes the available processors, communication links, I/O devices, and implementations of processes on processors. Previous work had proposed solving this problem by integer linear programming (ILP); our algorithm is much faster than ILP and produces high-quality results.