Performance and fault modeling with VHDL
Performance and fault modeling with VHDL
An architecture design and assessment system for software/hardware codesign
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Petri Net Theory and the Modeling of Systems
Petri Net Theory and the Modeling of Systems
VHDL: Analysis and Modeling of Digital Systems
VHDL: Analysis and Modeling of Digital Systems
A Model and Methodology for Hardware-Software Codesign
IEEE Design & Test
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Implementation-Independent Model of an Instruction Set Architecture in VHDL
IEEE Design & Test
| Hi-index | 0.00 |
Performance modeling, simulation and analysis of the system behavior through virtual prototyping, form the core steps of the system design process. Past CAD support to link the high level conceptual modeling phase with the implementation phase has been virtually non-existent. In this paper, we describe our work to use VHDL to build design libraries that support conceptual modeling. These library components can be instantiated for rapid prototyping, simulation, and performance analysis. They include high level structures to allow construction of system models containing both interpreted and uninterpreted components. This helps in creating a strong design environment in VHDL which can support the entire design cycle. In addition, the design libraries have been linked with a graphical design environment. This graphical environment provides a single framework in which the designer can (i) build the design, (ii) simulate the design for correctness, and (iii) visualize performance results and capacity measures.