Evaluation Based upon Stochastic Petri Nets of the Maximum Throughput of a Full Duplex Protocol
Selected Papers from the First and the Second European Workshop on Application and Theory of Petri Nets
Software CAD: A Revolutionary Approach
IEEE Transactions on Software Engineering
Hardware/software codesign: a perspective
ICSE '91 Proceedings of the 13th international conference on Software engineering
Hardware/Software Codesign from the RASSP Perspective
Journal of VLSI Signal Processing Systems - Special issue on the rapid prototyping of application specific signal processors (RASSP) program
Performance Modeling of System Architectures
Journal of VLSI Signal Processing Systems - Special issue on the rapid prototyping of application specific signal processors (RASSP) program
An integrated design environment for performance and dependability analysis
DAC '97 Proceedings of the 34th annual Design Automation Conference
A graphical hardware design language
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
An architecture level simulation methodology
ANSS '91 Proceedings of the 24th annual symposium on Simulation
The evolution of software performance engineering: a survey
ACM '86 Proceedings of 1986 ACM Fall joint computer conference
MASCOTS '95 Proceedings of the 3rd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
Origins of Software Performance Engineering: Highlights and Outstanding Problems
Performance Engineering, State of the Art and Current Trends
Origins of Software Performance Engineering: Highlights and Outstanding Problems
Performance Engineering, State of the Art and Current Trends
A Model for the Coanalysis of Hardware and Software Architectures
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
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Codesign of hardware and software for high performance signal processing systems is important if the potential benefits of VLSI are to be realized. This article describes a CAD system developed to support the codesign of hardware and software architectures for high performance digital signal processors which is based on a directed graph methodology. A comprehensive example is developed to demonstrate the use of the system, the fundamentals of the modeling and analysis methodology are discussed, and an overview of the tools in the system is presented along with a discussion of the enhancements currently being developed.