CoWare—a design environment for heterogenous hardware/software systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Rate derivation and its applications to reactive, real-time embedded systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
Hardware/software co-synthesis with memory hierarchies
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Communication synthesis for distributed embedded systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Turning clockwise: using UML in the real-time domain
Communications of the ACM
A codesign virtual machine for hierarchical, balanced hardware/software system modeling
Proceedings of the 37th Annual Design Automation Conference
Operating system based software generation for systems-on-chip
Proceedings of the 37th Annual Design Automation Conference
Modeling and evaluation of hardware/software designs
Proceedings of the ninth international symposium on Hardware/software codesign
Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications
Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-level modeling of a network switch SoC
Proceedings of the 15th international symposium on System Synthesis
Multi-Level Modeling of Software on Hardware in Concurrent Computation
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
The design context of concurrent computation systems
Proceedings of the tenth international symposium on Hardware/software codesign
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We introduce a formal basis for viewing computer systems as mixed steady state and non-steady state (transient) behaviors to motivate novel design strategies resulting from simultaneous consideration of function, scheduling and architecture. We relate three design styles: hierarchical decomposition, static mapping and directed platform that have traditionally been separate. By considering them together, we reason that once a steady state system is mapped to an architecture, the unused processing and communication power may be viewed as a platform for a transient system, ultimately resulting in more effective design approaches that ease the static mapping problem while still allowing for effective utilization of resources. Our simulation environment, frequency interleaving, mixes a formal and experimental approach as illustrated in an example.