Computer Networks and ISDN Systems
CoWare—a design environment for heterogenous hardware/software systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Heterogeneous Simulation—Mixing Discrete-Event Models with Dataflow
Journal of VLSI Signal Processing Systems - Special issue on the rapid prototyping of application specific signal processors (RASSP) program
Dynamic communication models in embedded system co-simulation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Hardware/software co-design of an ATM network interface card: a case study
Proceedings of the 6th international workshop on Hardware/software codesign
Models and languages for parallel computation
ACM Computing Surveys (CSUR)
The Unified Modeling Language user guide
The Unified Modeling Language user guide
Peer-based multithreaded executable co-specification
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
ECL: a specification environment for system-level design
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A codesign virtual machine for hierarchical, balanced hardware/software system modeling
Proceedings of the 37th Annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A codesign virtual machine for hierarchical, balanced hardware/software system modeling
Proceedings of the 37th Annual Design Automation Conference
Modeling and evaluation of hardware/software designs
Proceedings of the ninth international symposium on Hardware/software codesign
Multi-Level Modeling of Software on Hardware in Concurrent Computation
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
The design context of concurrent computation systems
Proceedings of the tenth international symposium on Hardware/software codesign
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Frequency interleaving is introduced as a means of conceptualizing and co-scheduling hardware and software behaviors so that software models with conceptually unbounded state and execution time are resolved with hardware resources. The novel mechanisms that result in frequency interleaving are a shared memory foundation for all system modeling (from gates to software-intensive subsystems) and de-coupled, but interrelated time- and state-interleaved scheduling domains. The result for system modeling is greater accommodation of software as a configuration paradigm that loads system resources, a greater accommodation of shared memory modeling, and a greater representation of software schedulers as a system architectural abstraction. The results for system co-simulation are a lessening of the dependence on discrete event simulation as a means of merging physical and non-physical models of computation, and a lessening of the need to partition a system as computation and communication too early in the design. We include an example demonstrating its implementation.