A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor

Authors:
Shinji Kimura;Yasufumi Itou;Makoto Hirao;Katumasa Watanabe;Mitsuteru Yukishita;Akira Nagoya
Affiliations:
Nara Institute of Science and technology;Nara Institute of Science and technology;Nara Institute of Science and technology;Nara Institute of Science and technology;NTT Communication Science Laboratory;NTT Communication Science Laboratory
Venue:
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Year:
1997

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Abstract

This paper shows a hardware/software codesign method for a computer system with a reconfigurable co-processor. The reconfigurable co-processor is constructed from FPGA's, internal cache and a control part, and is connected to the system bus of the computer system. This paper shows the architecture of the reconfigurable co-processor, a hardware/software separation method and a co-operation method via the DMA based memory sharing. We also show co-operation examples and the effectiveness of our approach for the fast execution of user processes.