Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
High level synthesis of ASICs under timing and synchronization constraints
High level synthesis of ASICs under timing and synchronization constraints
Synthesis and simulation of digital systems containing interacting hardware and software components
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Code generation techniques
Computer
Co-synthesis of hardware and software for digital embedded systems
Co-synthesis of hardware and software for digital embedded systems
Software scheduling in the co-synthesis of reactive real-time systems
DAC '94 Proceedings of the 31st annual Design Automation Conference
A Model and Methodology for Hardware-Software Codesign
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Scheduling for Reactive Real-Time Systems
IEEE Micro
Analysis and Synthesis of Concurrent Digital Circuits Using Control-Flow Expressions
Analysis and Synthesis of Concurrent Digital Circuits Using Control-Flow Expressions
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During the life cycle of a digital reactive real-time system implemented as a hardware-software board or chip, some of its components must be redesigned, either because a refocusing of the product market resulted in a specification change, or because bugs in the specification were found at a later stage of the design.We address the problem of automatically checking if a new version of a specification can utilize a hardware-software implementation of a previous version of the same specification by just changing the software portion of the design.The redesigning strategy we propose is divided into four phases. In the first phase, we check which parts of the specification were changed. In the second phase, we extract timing constraints from the previous hardware implementation that must be satisfied by the new software implementation. Then, we schedule and select the instructions in the software routine such that the timing constraints are observed. Finally, we check if the final implementation satisfies the specification rate constraints of the design.We present an example of a keyboard/mouse device, and we show that the hardware-software synthesis system can be made robust with respect to small changes in the specification.