Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Computer arithmetic systems: algorithms, architecture and implementation
Computer arithmetic systems: algorithms, architecture and implementation
System level fixed-point design based on an interpolative approach
DAC '97 Proceedings of the 34th annual Design Automation Conference
Arithmetic optimization using carry-save-adders
DAC '98 Proceedings of the 35th annual Design Automation Conference
A fine-grained arithmetic optimization technique for high-performance/low-power data path synthesis
Proceedings of the 37th Annual Design Automation Conference
Optimal allocation of carry-save-adders in arithmetic optimization
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Layout-aware synthesis of arithmetic circuits
Proceedings of the 39th annual Design Automation Conference
An integrated approach to timing-driven synthesis and placement of arithmetic circuits
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Tight integration of timing-driven synthesis and placement of parallel multiplier circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Improved use of the carry-save representation for the synthesis of complex arithmetic circuits
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Journal of Experimental Algorithmics (JEA)
Resource sharing among mutually exclusive sum-of-product blocks for area reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A New Datapath Merging Method for Reconfigurable System
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
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We introduce the notions of required precision and information content of datapath signals and use them to define functionally safe transformations on data ow graphs. These transformations reduce widths of datapath operators and enhance their mergeability. Using efficient algorithms to compute required precision and information content of signals, we define a new algorithm for partitioning a data flow graph consisting of datapath operators into mergeable clusters. Experimental results indicate that use of our clustering algorithm for operator merging based synthesis of datapath intensive designs, can lead to significant improvement in the delay and area of the implementation.