An efficient hybrid engine to perform range analysis and allocate integer bit-widths for arithmetic circuits

Authors:
Yu Pang;Katarzyna Radecka;Zeljko Zilic
Affiliations:
Chongqing University of Posts and Telecommunications Chongqing, China;McGill University, Montreal, Quebec, Canada;McGill University, Montreal, Quebec, Canada
Venue:
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Year:
2011

Citing 10
Cited 1

Experience in designing a large-scale multiprocessor using field-programmable devices and advanced CAD tools

DAC '96 Proceedings of the 33rd annual Design Automation Conference
A Multiple-Valued Reed-Muller Transform for Incompletely Specified Functions

IEEE Transactions on Computers
Automated fixed-point data-type optimization tool for signal processing and communication systems

Proceedings of the 41st annual Design Automation Conference
A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing

NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Optimizing imprecise fixed-point arithmetic circuits specified by Taylor Series through arithmetic transform

Proceedings of the 45th annual Design Automation Conference
Optimization of imprecise circuits represented by Taylor series and real-valued polynomials

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Finite precision bit-width allocation using SAT-modulo theory

Proceedings of the Conference on Design, Automation and Test in Europe
Combined word-length optimization and high-level synthesis of digital signal processing systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wordlength optimization for linear digital signal processing

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Accuracy-Guaranteed Bit-Width Optimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

A bit too precise? bounded verification of quantized digital filters

TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

Range analysis is an important task in obtaining the correct, yet fast and inexpensive arithmetic circuits. The traditional methods, either simulation-based or static, have the disadvantage of low efficiency and coarse bounds, which may lead to unnecessary bits. In this paper, we propose a new method that combines several techniques to perform fixed-point range analysis in a datapath towards obtaining the much tighter ranges efficiently. We show that the range and the bit-width allocation can be obtained with better results relative to the past methods, and in significantly shorter time.