PALMINI—fast Boolean minimizer for personal computers
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Complexity in information theory
Complexity in information theory
Graph coloring algorithms for fast evaluation of Curtis decompositions
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Concurrent D-algorithm on reconfigurable hardware
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Building an artificial brain using an FPGA based CAM-Brain machine
Applied Mathematics and Computation
A relational model of data for large shared data banks
Communications of the ACM
Journal of Systems Architecture: the EUROMICRO Journal
Rough Sets: Theoretical Aspects of Reasoning about Data
Rough Sets: Theoretical Aspects of Reasoning about Data
Logic Design of Digital Systems
Logic Design of Digital Systems
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Representations of Discrete Functions
Representations of Discrete Functions
Machine Learning and Data Mining; Methods and Applications
Machine Learning and Data Mining; Methods and Applications
Journal of Systems Architecture: the EUROMICRO Journal
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
Decomposition of multiple-valued relations
ISMVL '97 Proceedings of the 27th International Symposium on Multiple-Valued Logic
Multi-Valued Functional Decomposition as a Machine Learning Method
ISMVL '98 Proceedings of the The 28th International Symposium on Multiple-Valued Logic
An Error Reducing Approach to Machine Learning using Multi-Valued Functional Decomposition
ISMVL '98 Proceedings of the The 28th International Symposium on Multiple-Valued Logic
Optimization of Multi-Valued Multi-Level Networks
ISMVL '02 Proceedings of the 32nd International Symposium on Multiple-Valued Logic
Inductive inference of VL decision rules
ACM SIGART Bulletin
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
New multivalued functional decomposition algorithms based on MDDs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Configware and morphware going mainstream
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Fast and compact sequential circuits for the FPGA-based reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
ICES'10 Proceedings of the 9th international conference on Evolvable systems: from biology to hardware
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The authors propose a learning-hardware approach as a generalization of evolvable hardware. A massively parallel, reconfigurable processor speeds up logic operators performed in learning hardware. The approach uses combinatorial synthesis methods developed within the framework of the logic synthesis in digital-circuit-design automation.