Prime Implicants, Minimum Covers, and the Complexity of Logic Simplification
IEEE Transactions on Computers
Logic design of digital systems
Logic design of digital systems
The Concept of Term Exclusiveness and Its Effect on the Theory of Boolean Functions
Journal of the ACM (JACM)
Computers and Intractability; A Guide to the Theory of NP-Completeness
Computers and Intractability; A Guide to the Theory of NP-Completeness
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Computer aided minimization procedure for boolean functions
DAC '84 Proceedings of the 21st Design Automation Conference
A State-Machine Synthesizer—SMS
DAC '81 Proceedings of the 18th Design Automation Conference
EURO-DAC '92 Proceedings of the conference on European design automation
Espresso-signature: a new exact minimizer for logic functions
DAC '93 Proceedings of the 30th international Design Automation Conference
Graph coloring algorithms for fast evaluation of Curtis decompositions
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Worst and Best Irredundant Sum-of-Products Expressions
IEEE Transactions on Computers
BOOM: a heuristic boolean minimizer
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
EURO-DAC '90 Proceedings of the conference on European design automation
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This paper describes a fast and efficient method for minimization of two level single output Boolean functions. The minimization problem is reduced to that of coloring of the graph of incompatibility of implicants. The program permits also to remove static hazards and allows inversion of output's polarity which proves to be very convenient when designing with PAL's. It gives solutions within a very reasonable amount of time. On small industrial examples its speed is slightly better than Espresso and it occupies 6 times less memory.