Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Exact algorithms for output encoding, state assignment, and four-level Boolean minimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Solving the state assignment problem for signal transition graphs
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
State assignment using input/output functions
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Efficient constrained encoding for VLSI sequential logic synthesis
EURO-DAC '92 Proceedings of the conference on European design automation
State assignment for hardwired VLSI control units
ACM Computing Surveys (CSUR)
Optimum functional decomposition using encoding
DAC '94 Proceedings of the 31st annual Design Automation Conference
Symbolic hazard-free minimization and encoding of asynchronous finite state machines
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Cluster-cover: a theoretical framework for a class of VLSI-CAD optimization problems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Identifying Minimal Shift Counters: A Search Technique
IEEE Transactions on Computers
Algorithms for the optimal state assignment of asynchronous state machines
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
XBM2PLA: A Flexible Synthesis Tool for Extended Burst Mode Machines
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines
IEEE Transactions on Computers
Soft-error tolerance and mitigation in asynchronous burst-mode circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.01 |