Multi-level logic simplification using don't cares and filters
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Logic synthesis for programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A framework for satisfying input and output encoding constraints
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
BDD based decomposition of logic functions with application to FPGA synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Functional multiple-output decomposition: theory and an implicit algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A method for finding good Ashenhurst decompositions and its application to FPGA synthesis
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Compatible class encoding in Roth-Karp decomposition for two-output LUT architecture
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Combinational logic synthesis for LUT based field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Compatible class encoding in hyper-function decomposition for FPGA synthesis
DAC '98 Proceedings of the 35th annual Design Automation Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Constructive library-aware synthesis using symmetries
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Finding an optimal functional decomposition for LUT-based FPGA synthesis
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Optimum Functional Decomposition for LUT-Based FPGA Synthesis
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Resynthesis of multi-level circuits under tight constraints using symbolic optimization
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A new enhanced constructive decomposition and mapping algorithm
Proceedings of the 40th annual Design Automation Conference
An Implicit Algorithm for Support Minimization during Functional Decomposition
EDTC '96 Proceedings of the 1996 European conference on Design and Test
A New Method of Coding Minorants in Problems of Synthesis of Digital Devices from PLAs
Cybernetics and Systems Analysis
Journal of Systems Architecture: the EUROMICRO Journal
Logic synthesis based on decomposition for CPLDs
Microprocessors & Microsystems
Computing support-minimal subfunctions during functional decomposition
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Decomposition-based logic synthesis for PAL-based CPLDs
International Journal of Applied Mathematics and Computer Science
Encoding multi-valued functions for symmetry
Proceedings of the International Conference on Computer-Aided Design
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