Logic synthesis for programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Chortle-crf: Fast technology mapping for lookup table-based FPGAs
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Xmap: A technology mapper for table-lookup field-programmable gate arrays
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A new viewpoint on two-level logic minimization
DAC '93 Proceedings of the 30th international Design Automation Conference
BDD based decomposition of logic functions with application to FPGA synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
Optimum functional decomposition using encoding
DAC '94 Proceedings of the 31st annual Design Automation Conference
A fully implicit algorithm for exact state minimization
DAC '94 Proceedings of the 31st annual Design Automation Conference
Lambda set selection in Roth-Karp decomposition for LUT-based FPGA technology mapping
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Combinational logic synthesis for LUT based field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Journal of the ACM (JACM)
Logic Synthesis and Optimization
Logic Synthesis and Optimization
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
FPGA Synthesis Using Function Decomposition
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Technology mapping for a two-output RAM-based field programmable gate array
EURO-DAC '91 Proceedings of the conference on European design automation
OBDD-based function decomposition: algorithms and implementation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the conference on Design, automation and test in Europe
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Effective and efficient FPGA synthesis through general functional decomposition
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal
Information-driven circuit synthesis with the pre-characterized gate libraries
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
An efficient variable partitioning approach for functional decomposition of circuits
Journal of Systems Architecture: the EUROMICRO Journal
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Boolean factoring and decomposition of logic networks
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
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Functional decomposition is an important technique for technology mapping to look up table-based FPGA architectures. We present the theory of and a novel approach to functional disjoint decomposition of multiple-output functions, in which common subfunctions are extracted during technology mapping. While a Boolean function usually has a very large number of subfunctions, we show that not all of them are useful for multiple-output decomposition. We use a partition of the set of bound set vertices as the basis to compute preferable decomposition functions, which are sufficient for an optimal multiple-output decomposition. We propose several new algorithms that deal with central issues of functional multiple-output decomposition. First, an efficient algorithm to solve the variable partitioning problem is described. Second, we show how to implicitly compute all preferable functions of a single-output function and how to identify all common preferable functions of a multiple-output function. Due to implicit computation in the crucial steps, the algorithm is very efficient. Experimental results show significant reductions in area.