Effective and efficient FPGA synthesis through general functional decomposition

Authors:
L. JóŹwiak;A. Chojnacki
Affiliations:
Faculty of Electrical Engineering, Eindhoven University of Technology, EH 9.24, P.O. Box 513, Den Dolech 2, 5600 MB Eindhoven, The Netherlands;PDF Solutions Inc., San Jose, CA
Venue:
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Year:
2003

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Abstract

In this paper, a new information-driven circuit synthesis method is discussed that targets LUT-based FPGAs and FPGA-based reconfigurable system-on-a-chip platforms. The method is based on the bottom-up general functional decomposition and theory of information relationship measures that we previously developed. It differs considerably from all other known methods. The experimental results from the automatic circuit synthesis tool that implements the method clearly demonstrate that the information-driven general functional decomposition based on information relationship measures efficiently produces very fast and compact FPGA circuits.