On nominal delay minimization in LUT-based FPGA technology mapping
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Combinational logic synthesis for LUT based field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA designs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Effective and efficient FPGA synthesis through general functional decomposition
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
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