Journal of the ACM (JACM)
Combinational logic synthesis for LUT based field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Boolean approach to performance-directed technology mapping for LUT-based FPGA designs
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Partially-dependent functional decomposition with applications in FPGA synthesis and mapping
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Boolean matching for complex PLBs in LUT-based FPGAs with application to architecture evaluation
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Use of Decomposition Theory in the Solution of the State Assignment Problem of Sequential Machines
Journal of the ACM (JACM)
Generalized Tree Circuit—The Basic Building Block of an Extended Decomposition Theory
Journal of the ACM (JACM)
Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA designs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the conference on Design, automation and test in Europe
Multi-output functional decomposition with exploitation of don't cares
Proceedings of the conference on Design, automation and test in Europe
Finding an optimal functional decomposition for LUT-based FPGA synthesis
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Optimum Functional Decomposition for LUT-Based FPGA Synthesis
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Effective and efficient FPGA synthesis through general functional decomposition
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal
Information-driven circuit synthesis with the pre-characterized gate libraries
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
Universal Logic Modules and Their Applications
IEEE Transactions on Computers
Multiple-Output Optimization with Mosaics of Boolean Functions
IEEE Transactions on Computers
Minimization over Boolean graphs
IBM Journal of Research and Development
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From the very founding of switching theory by Claude E. Shannon, the tree circuit has been a useful instrument in the design of logic networks. Besides being a valuable practical addition to the designer's “tool kit”, it has been a theoretical asset in the study of circuit complexity and the establishment of general bounds on the relative costs of switching networks. The object of this paper is to expand the practical and theoretical scope of the tree circuit. The expansion is effected by the formulation of a generalized tree circuit, which in actuality is a set of circuits having basic tree circuit characteristics.