BDD based decomposition of logic functions with application to FPGA synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
A method for finding good Ashenhurst decompositions and its application to FPGA synthesis
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Lambda set selection in Roth-Karp decomposition for LUT-based FPGA technology mapping
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
The disjunctive decomposition of logic functions
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Finding all simple disjunctive decompositions using irredundant sum-of-products forms
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Journal of the ACM (JACM)
Constructive library-aware synthesis using symmetries
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Multi-output functional decomposition with exploitation of don't cares
Proceedings of the conference on Design, automation and test in Europe
Journal of Systems Architecture: the EUROMICRO Journal - The Euromicro Journal
Multi-level logic optimization
Logic Synthesis and Verification
Technology Mapping via Transformations of Function Graphs
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Decomposition of multiple-valued relations
ISMVL '97 Proceedings of the 27th International Symposium on Multiple-Valued Logic
Information Relationships and Measures in Application to Logic Design
ISMVL '99 Proceedings of the Twenty Ninth IEEE International Symposium on Multiple-Valued Logic
ISMVL '00 Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic
DSD '01 Proceedings of the Euromicro Symposium on Digital Systems Design
Fast and compact sequential circuits for the FPGA-based reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal
Algebraic structure theory of sequential machines (Prentice-Hall international series in applied mathematics)
Computing support-minimal subfunctions during functional decomposition
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
OBDD-based function decomposition: algorithms and implementation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
BDS: a BDD-based logic optimization system
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Contributions to the evaluation of ensembles of combinational logic gates
Microelectronics Journal
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The opportunities created by modern microelectronic technology cannot effectively be exploited, because of weaknesses in traditional circuit synthesis methods used in today's CAD tools. In this paper, a new information-driven circuit synthesis method is discussed that targets combinational circuits implemented with gates from the pre-characterized gate libraries. The method is based on our original information-driven approach to circuit synthesis, bottom up general functional decomposition and theory of information relationship measures. It differs considerably from all other known methods. The experimental results from the automatic circuit synthesis tool that implements the method demonstrate that the information-driven general decomposition produces very fast and compact gate-based circuits.