Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
The Transduction Method-Design of Logic Networks Based on Permissible Functions
IEEE Transactions on Computers
BDD based decomposition of logic functions with application to FPGA synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
The disjunctive decomposition of logic functions
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Finding all simple disjunctive decompositions using irredundant sum-of-products forms
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
An algorithm for bi-decomposition of logic functions
Proceedings of the 38th annual Design Automation Conference
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
BDD Decomposition for Efficient Logic Synthesis
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
USING IF-THEN-ELSE DAGs FOR MULTI-LEVEL LOGIC MINIMIZATION
USING IF-THEN-ELSE DAGs FOR MULTI-LEVEL LOGIC MINIMIZATION
Logic synthesis for vlsi design
Logic synthesis for vlsi design
A new decomposition method for multilevel circuit design
EURO-DAC '91 Proceedings of the conference on European design automation
Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
New multivalued functional decomposition algorithms based on MDDs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Journal of Systems Architecture: the EUROMICRO Journal
Information-driven circuit synthesis with the pre-characterized gate libraries
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
The optimization of kEP-SOPs: Computational complexity, approximability and experiments
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Timing-driven optimization using lookahead logic circuits
Proceedings of the 46th Annual Design Automation Conference
SOP restructuring by exploiting don't cares
Microprocessors & Microsystems
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Three basic methods for multi-level logic optimization, namely algebraic logic optimization, Boolean logic optimization, and decomposition is a fundamental technology for the generation of multi-level logic. The application of BDDs offers an increased computational efficiency and makes them an attractive alternative to algebraic methods. These three methods are key technologies for state-of-the-art logic synthesis tools.