Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
BDD based decomposition of logic functions with application to FPGA synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
The disjunctive decomposition of logic functions
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Restricted Simple Disjunctive Decompositions Based on Grouping Symmetric Variables
GLS '97 Proceedings of the 7th Great Lakes Symposium on VLSI
Fast factorization method for implicit cube set representation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Three parameters to find functional decompositions
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
An algorithm for bi-decomposition of logic functions
Proceedings of the 38th annual Design Automation Conference
Multi-level logic optimization
Logic Synthesis and Verification
Disjoint-support Boolean decomposition combining functional and structural methods
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Journal of Systems Architecture: the EUROMICRO Journal
Information-driven circuit synthesis with the pre-characterized gate libraries
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
A BDD-based fast heuristic algorithm for disjoint decomposition
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Iterative layering: optimizing arithmetic circuits by structuring the information flow
Proceedings of the 2009 International Conference on Computer-Aided Design
Nanopipelined threshold network synthesis
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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