BDD based decomposition of logic functions with application to FPGA synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
Optimum functional decomposition using encoding
DAC '94 Proceedings of the 31st annual Design Automation Conference
A method for finding good Ashenhurst decompositions and its application to FPGA synthesis
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Lambda set selection in Roth-Karp decomposition for LUT-based FPGA technology mapping
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Communication based FPGA synthesis for multi-output Boolean functions
ASP-DAC '95 Proceedings of the 1995 Asia and South Pacific Design Automation Conference
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
The disjunctive decomposition of logic functions
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Finding all simple disjunctive decompositions using irredundant sum-of-products forms
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Journal of the ACM (JACM)
Proceedings of the conference on Design, automation and test in Europe
Journal of Systems Architecture: the EUROMICRO Journal - The Euromicro Journal
Rough Sets and Data Mining: Analysis of Imprecise Data
Rough Sets and Data Mining: Analysis of Imprecise Data
Multi-level logic optimization
Logic Synthesis and Verification
Sequential Logic Synthesis
Technology Mapping via Transformations of Function Graphs
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Decomposition of multiple-valued relations
ISMVL '97 Proceedings of the 27th International Symposium on Multiple-Valued Logic
Multi-Valued Functional Decomposition as a Machine Learning Method
ISMVL '98 Proceedings of the The 28th International Symposium on Multiple-Valued Logic
Information Relationships and Measures in Application to Logic Design
ISMVL '99 Proceedings of the Twenty Ninth IEEE International Symposium on Multiple-Valued Logic
ISMVL '00 Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic
Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis
DSD '01 Proceedings of the Euromicro Symposium on Digital Systems Design
DSD '01 Proceedings of the Euromicro Symposium on Digital Systems Design
Decomposition of Multiple-Valued Functions
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
Information-driven Library-based Circuit Synthesis
DSD '03 Proceedings of the Euromicro Symposium on Digital Systems Design
Fast and compact sequential circuits for the FPGA-based reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Algebraic structure theory of sequential machines (Prentice-Hall international series in applied mathematics)
Computing support-minimal subfunctions during functional decomposition
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
OBDD-based function decomposition: algorithms and implementation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
BDS: a BDD-based logic optimization system
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Information-driven circuit synthesis with the pre-characterized gate libraries
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
| Hi-index | 0.00 |
This paper is devoted to decomposition of sequential machines, discrete functions and relations. Sequential machine decomposition consists in representation of a given machine as a network of collaborating partial machines that together realize behavior of the given machine. A good understanding of possible decomposition structures and of conditions under which the corresponding structures exist is a prerequisite for any adequate circuit or system synthesis. The paper discusses the theory of general decomposition of incompletely specified sequential machines with multistate behavior realization. The central point of this theory is a constructive theorem on the existence of the general decomposition structures and conditions under which the corresponding structures exist. The theory of general decomposition presented in this paper is the most general known theory of the binary, multi-valued and symbolic sequential and combinational discrete network structures. The correct circuit generator defined by the general decomposition theorem covers all other known structural models of sequential and combinational circuits as its special cases. Using this theory, in recent years we developed a number of effective and efficient methods and EDA tools for sequential and combinational circuit synthesis that consistently construct much better circuits than other academic and commercial state-of-the-art synthesis tools. This demonstrates the practical soundness of our theory. This theory can be applied to any sort of binary, multi-valued and symbolic systems expressed as networks of relations, functions or sequential machines, and can be very useful in such fields as circuit and architecture synthesis of VLSI systems, knowledge engineering, machine learning, neural network training, pattern analysis, etc.