Communication based FPGA synthesis for multi-output Boolean functions

Wireplanning in logic synthesis

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

Multi-output functional decomposition with exploitation of don't cares

Proceedings of the conference on Design, automation and test in Europe

Minimizing ROBDD Sizes of Incompletely Specified Boolean Functions by Exploiting Strong Symmetries

EDTC '97 Proceedings of the 1997 European conference on Design and Test

A method to decompose multiple-output logic functions

Proceedings of the 41st annual Design Automation Conference

General decomposition of incompletely specified sequential machines with multi-state behavior realization

Journal of Systems Architecture: the EUROMICRO Journal