Layout driven technology mapping
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Routability-driven fanout optimization
DAC '93 Proceedings of the 30th international Design Automation Conference
Don't cares in multi-level network optimization
Don't cares in multi-level network optimization
Minimizing the routing cost during logic extraction
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Communication based FPGA synthesis for multi-output Boolean functions
ASP-DAC '95 Proceedings of the 1995 Asia and South Pacific Design Automation Conference
Timing driven placement in interaction with netlist transformations
Proceedings of the 1997 international symposium on Physical design
The future of logic synthesis and physical design in deep-submicron process geometries
Proceedings of the 1997 international symposium on Physical design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Hierarchical functional timing analysis
DAC '98 Proceedings of the 35th annual Design Automation Conference
Using partitioning to help convergence in the standard-cell design automation methodology
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Synthesis for multiple input wires replacement of a gate for wiring consideration
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A methodology for correct-by-construction latency insensitive design
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Interconnect scaling implications for CAD
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
The future of logic synthesis and verification
Logic Synthesis and Verification
Addressing the timing closure problem by integrating logic optimization and placement
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Design topology aware physical metrics for placement analysis
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Metrics for structural logic synthesis
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Timing optimization of FPGA placements by logic replication
Proceedings of the 40th annual Design Automation Conference
Quality of EDA CAD Tools: Definitions, Metrics and Directions
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Concurrent Placement and Routing in the Design of Integrated Circuits
Automation and Remote Control
An approach to placement-coupled logic replication
Proceedings of the 41st annual Design Automation Conference
Time Budgeting in a Wireplanning Context
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A new incremental placement algorithm and its application to congestion-aware divisor extraction
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Timing-driven placement based on monotone cell ordering constraints
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Techniques for improved placement-coupled logic replication
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Intrinsic shortest path length: a new, accurate a priori wirelength estimator
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Optimizing non-monotonic interconnect using functional simulation and logic restructuring
Proceedings of the 2008 international symposium on Physical design
Power Modeling and Characterization of Computing Devices: A Survey
Foundations and Trends in Electronic Design Automation
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