Finding an optimal functional decomposition for LUT-based FPGA synthesis

  • Authors:
  • Jian Qiao;Makoto Ikeda;Kunihiro Asada

  • Affiliations:
  • Department of Electronic engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan;VLSI Design and Education Center, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan;VLSI Design and Education Center, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan

  • Venue:
  • Proceedings of the 2001 Asia and South Pacific Design Automation Conference
  • Year:
  • 2001

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Abstract

In this paper, we propose a novel approach to the optimal functional decomposition for LUT-based FPGA synthesis. We focus on exploring all design space and finding a set of which can be merged, to the maximal extent, into multiple-output CLBs or an LUT such that the decomposition constructed from the components is also minimal. In particular, to exploit more degrees of freedom, pliable encoding has been introduced to take over the classical rigid encoding process when the latter fails to get a satisfactory solution. Experimental results on a set of MCNC91 benchmarks show that our method is promising.