A framework for satisfying input and output encoding constraints
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A unified approach to input-output encoding for FSM state assignment
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A unified approach for the synthesis of self-testable finite state machines
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Design of shift counters
Shift Register Sequences
Algebraic structure theory of sequential machines (Prentice-Hall international series in applied mathematics)
| Hi-index | 14.98 |
A minimal modulo-m n-stage shift counter is defined as a shift counter with a feedback function of the form Y/sub 1/=y/sub n/.